Reference Build: A Robotics + AI Lab in One Rack
The articles before this one describe the architecture, the software stack, the power budget, and the network design. This one puts a price tag and a parts list on all of it — drawn from real hardware Kentino has shipped and benchmarked, not a theoretical BOM assembled from a marketing sheet.
The deployment target is a research or integration lab running one to four robots alongside on-prem inference and a training runway. Mid-scale: not a hobbyist box that can barely serve a 7B, not a hyperscale cluster that requires a facilities team. A serious working environment that a team of two to six people can stand up, operate, and evolve without dedicated DevOps.
The article covers two tiers of the same architectural pattern. The 4-GPU development tier is where most labs start. The 8-GPU production tier is where they land after the first real workload. The hardware choices are different; the architecture is identical.
What the fleet data shows
Kentino has deployed a fleet of uniformly configured 4-GPU compute nodes. Each unit carries the same specification: AMD EPYC 7542 (32 cores / 64 threads, 2.9 GHz boost), 512 GB DDR4 ECC LRDIMM at 2666 MT/s across eight DIMMs, four RTX 4090 GPUs (24 GB VRAM each, 96 GB total), a 2 TB NVMe scratch drive, and a 512 GB SATA SSD for the OS. Motherboard is the ASRockRack ROMED8-2T/BCM. Ubuntu 24.04 LTS, kernel 6.8.0-generic, NVIDIA driver 590.48.01, CUDA 13.1/13.2.
All ten nodes produce identical benchmark numbers. That is not an accident — it is the point of a reference build. When every unit leaves the same config, the benchmark is a specification, not a lucky run.
GPU compute
FP16 tensor-core matmul across the four cards (8192 × 8192 workload):
| GPU | Sustained FP16 (TFLOPS) | Peak temp (stress) | Peak power (stress) |
|---|---|---|---|
| 0 | 165.8 | 67 °C | 482 W |
| 1 | 153.2 | 64 °C | 450 W |
| 2 | 166.4 | 72 °C | 501 W |
| 3 | 166.2 | 62 °C | 481 W |
| Total | 651.6 | ~1,914 W |
GPU 1 runs about 6% lower than GPUs 0, 2, and 3 — within the normal silicon-lottery spread for consumer cards. All four passed 60-second GPU-burn and combined GPU+CPU burn with zero computation errors. Temperature headroom is comfortable: the thermal throttle threshold for RTX 4090 is 83 °C, and the hottest card in the fleet peaked at 73 °C under simultaneous GPU and CPU load. No throttling was observed on any node.
A practical note on power limits: the fleet ships with per-card limits set slightly differently (450 W, 480 W, 500 W depending on slot). For sustained production use, normalising all four to 450 W smooths the aggregate draw and reduces PSU imbalance. The TFLOPS penalty at 450 W vs 500 W is under 2% — not worth the asymmetric rail load.
vLLM inference — Llama 3.3 70B AWQ
Benchmarked with vLLM 0.19.0, tensor_parallel_size=4, gpu_memory_utilization=0.80, max_model_len=2048:
| Test | Result |
|---|---|
| Single request (512 tokens) | 8.0 tok/s |
| Batch throughput (32 concurrent, 256 tokens each) | 179.3 tok/s aggregate |
| Per-request avg latency at batch-32 | 1,428 ms |
| P99 latency (short prompt, 16 tokens) | 2,043 ms |
| Model load time | 95 s |
One important caveat: the benchmark used the awq quantization kernel, not awq_marlin. The awq_marlin path on Ada Lovelace (RTX 4090) is 2–3× faster for single-request latency. Production deployments should use awq_marlin or the FP8 path under vLLM 0.20+, which closes the gap further. With awq_marlin, the single-request number above moves from ~8 tok/s to approximately 16–20 tok/s on these cards — more consistent with what users experience in practice. The aggregate batch throughput benefit is proportionally smaller because the bottleneck at high concurrency shifts to memory bandwidth rather than compute.
These numbers are for Llama 3.3 70B at INT4 (AWQ). A 7B or 8B model at Q4 runs 4–6× faster per token on the same hardware; a 13B model runs roughly 2.5× faster. The 70B number is the relevant sizing constraint for VLM and large planning models in a robotics context.
llama.cpp — single-user, no concurrency
Benchmarked with llama-cpp-python 0.3.20 (CUDA/cuBLAS), Llama 3.3 70B Instruct Q4_K_M GGUF, all four GPUs:
| Test | Result |
|---|---|
| Single-request generation (256 tokens) | 19.9–20.3 tok/s |
| Prompt evaluation (1302 tokens) | 1,568 tok/s |
| Model load time | 10.8 s |
llama.cpp loads faster (10.8 s vs 95 s for vLLM) and delivers higher single-user decode speed on these cards because it does not pay the continuous-batching scheduler overhead. The trade is zero concurrency — one user at a time. The right read of these numbers: llama.cpp on a 4-GPU node gives a developer a responsive 70B model for interactive use; vLLM is the right choice the moment you have more than one client.
See I02 for the full serving-stack decision matrix. The short version: start with vLLM in Docker, use awq_marlin quantization, and switch to llama.cpp only for single-user dev boxes or Jetson deployments.
GPU memory bandwidth
Device-to-device (on-card) bandwidth is consistent at 920.2–920.6 GB/s across all four cards — within 0.04% of each other, confirming GDDR6X is not the variable here. PCIe Host→Device bandwidth lands at 26.2–26.3 GB/s, confirming Gen4 x16 is fully negotiated under load (idle link-state shows Gen1 due to ASPM power saving — normal, not a fault). GPU-to-GPU peer transfers over PCIe (no NVLink) measure 19–22 GB/s, which is the expected ceiling for peer-to-peer over a shared PCIe root complex without NVLink (see N03 for context).
NVMe storage
| Test | Throughput | IOPS |
|---|---|---|
| Sequential read (1 M blocks) | 4,589 MB/s | 4,376 |
| Sequential write (1 M blocks) | 4,213 MB/s | 4,017 |
| Random read 4K, QD32 | 2,325 MB/s | 568,000 |
| Random write 4K, QD32 | 2,273 MB/s | 555,000 |
Sequential bandwidth is near the Gen4 x4 ceiling. Random IOPS at queue depth 32 saturates well: 568K read IOPS is well above what LLM weight loading or dataset access patterns demand at single-node scale. Model load from NVMe to VRAM takes 10–30 seconds depending on model size; this drive is not the bottleneck.
The reference build
BOM — 4-GPU development tier
The development tier is the right starting point for a lab running one or two robots, one or two active models, and occasional LoRA fine-tuning on the side.
- Compute: 4× RTX 4090, AMD EPYC 7542, 512 GB DDR4 ECC
- Storage: 2 TB NVMe (scratch) + 512 GB SATA (OS)
- Network: 10 GbE onboard (dual port, ROMED8-2T/BCM)
- PSU: dual ATX, split power delivery
- Chassis: 4U rack-mount, front-to-back airflow
PoE for AP (optional)
Development tier: 4-GPU compute node + managed ToR switch + 6 GHz AP + 5 kVA online UPS.
| Line item | Spec | EUR ex VAT (band) |
|---|---|---|
| GPU (×4) | RTX 4090 24 GB | €2,800–3,200 per card |
| CPU | AMD EPYC 7542 32C | €1,200–1,600 |
| Motherboard | ASRockRack ROMED8-2T/BCM | €800–1,100 |
| RAM | 8× 64 GB DDR4 ECC LRDIMM | €1,400–1,800 (full kit) |
| NVMe scratch | 2 TB Gen4 NVMe | €180–260 |
| SATA OS | 512 GB SSD | €60–90 |
| Chassis + fans | 4U rack-mount, industrial | €400–600 |
| PSU (×2) | 2 kW ATX, dual split delivery | €300–450 (pair) |
| ToR switch | 10 GbE managed, 8–16 port | €400–700 |
| Wi-Fi 6E AP | 6 GHz capable, PoE | €250–450 |
| UPS | 5 kVA double-conversion | €1,200–1,800 |
| Cabling + PDU | Cat6A + 3-phase PDU | €300–500 |
| Total compute node | €14,500–17,500 | |
| Total rack (node + infra) | €17,000–21,000 |
BOM — 8-GPU production tier
The production tier doubles GPU count. The architectural pattern is the same; the CPU, RAM, and chassis scale accordingly to support eight full-bandwidth PCIe slots. An AMD EPYC Genoa or Turin platform provides the PCIe lane budget for 8× x16 slots without bifurcation compromise (see W02).
| Line item | Spec | EUR ex VAT (band) |
|---|---|---|
| GPU (×8) | RTX 4090 24 GB | €2,800–3,200 per card |
| CPU | AMD EPYC Genoa / Turin (dual-socket capable) | €2,500–4,000 |
| Motherboard | Genoa/Turin platform, 8× PCIe Gen4/5 x16 | €1,800–2,800 |
| RAM | 16× 64 GB DDR5 ECC LRDIMM (1,024 GB) | €3,500–5,000 (full kit) |
| NVMe scratch | 2× 4 TB Gen4 NVMe | €600–900 |
| SATA OS | 512 GB SSD (×2, RAID-1) | €120–180 |
| Chassis + fans | 4U–6U rack-mount, 8× GPU, industrial | €1,200–2,000 |
| PSU (×2) | 3 kW ATX, dual split delivery | €600–900 (pair) |
| ToR switch | 25 GbE managed, 24 port (cluster-ready) | €1,200–2,200 |
| 25 GbE NIC | Mellanox ConnectX-5/6, dual port (add-on) | €300–600 |
| Wi-Fi 6E AP | 6 GHz, PoE | €250–450 |
| UPS | 10 kVA double-conversion | €3,000–5,000 |
| Cabling + PDU | Cat6A / DAC SFP + 3-phase metered PDU | €600–1,000 |
| Total compute node | €38,000–50,000 | |
| Total rack (node + infra) | €44,000–60,000 |
Note: the 25 GbE NIC add-on is only viable on 8-GPU chassis. The 4-GPU chassis does not have the slot clearance for an additional NIC card — the 10 GbE onboard ports on the ROMED8-2T/BCM are the practical limit on the 4-GPU tier (see N01 and the product page rules).
Storage beyond the compute node
| Tier | Purpose | Sizing rule | Cross-ref |
|---|---|---|---|
| Node NVMe (hot) | Active model weights, current dataset batch | 2–4 TB per node | — |
| NAS (warm) | Training datasets, episode archive, model registry | 40–200 TB usable | W06 |
| Off-site / cloud (cold) | Long-term archive, disaster recovery | As needed | — |
For the dev tier, a 4-bay NAS with 4× 16 TB HDDs gives 48 TB usable at RAID-5 — enough for a year of episode data for a 2-robot lab. Connect it at 10 GbE to the ToR switch; do not put it on the same interface as the robot traffic.
Power and cooling for the rack
From I04:
| Configuration | Compute sustained | Full rack (incl. robots, desks, infra) |
|---|---|---|
| 4-GPU dev tier | ~2.0–2.4 kW | ~5–7 kW |
| 8-GPU production tier | ~4.0–5.0 kW | ~10–13 kW |
The fleet stress-test data confirms the 4-GPU node draws ~1,914 W at full GPU load with all four cards hitting their power limits. Add CPU (~120 W sustained), NVMe, and fan overhead, and the node lands at approximately 2.1–2.2 kW sustained.
Electrical install for the dev tier: a 400 V 16 A three-phase feed is the minimum; 32 A three-phase gives the room to grow. PSU cords on two separate phases. See I04 and P02 for the wiring layout. For the production tier (10 kW full rack), you need a 400 V 32 A three-phase feed with at least 15 kW of cooling capacity.
UPS sizing: size for the server only, not the robots. For the dev tier, a 5 kVA double-conversion online UPS is the minimum sane choice. For the production tier, 10 kVA. Always specify online double-conversion. See P05.
Software stack on bare metal
- NVIDIA driver 590.x (pinned, open kernel module)
- CUDA 13.x toolkit
- nvidia-container-toolkit
- Primary: Llama 3.3 70B FP8 or Qwen 2.5 72B AWQ
- Optional: VLM (Qwen2.5-VL 32B on 4-GPU; 72B on 8-GPU)
- llama.cpp (dev / single-user fallback)
- nginx (reverse proxy, TLS, bearer auth)
- Prometheus + vLLM /metrics
- DCGM exporter (GPU SM util, power, temp, ECC)
- Grafana dashboards
Software stack: pinned Ubuntu + NVIDIA driver → container toolkit → vLLM + llama.cpp + nginx + monitoring.
Driver pinning is non-negotiable. The fleet runs driver 590.48.01; apt-mark hold nvidia-driver-590 is the first thing after bare-metal OS install. An unattended apt-get upgrade that pulls a newer driver has broken production inference exactly as many times as you would expect. See L01 for the full procedure.
Monitoring is not optional. The fleet data shows GPU 3 on one node had correctable PCIe AER errors (RxErr + BadTLP) during benchmarking — auto-corrected by hardware, but visible in DCGM counters. Without monitoring, this surfaces as "occasional weird inference errors" weeks later. Wire up DCGM and set an alert on correctable ECC errors above a baseline rate. See L05 for the Prometheus + Grafana stack.
Sizing variations
The 4-GPU development tier — what it can actually run
96 GB total VRAM (4× 24 GB) with TP=4:
| Model | Quant | Fits? | Approx. tok/s (single user) |
|---|---|---|---|
| Llama 3.3 / Qwen 2.5 70B | AWQ INT4 | Yes (~36 GB) | 16–22 (with awq_marlin) |
| Qwen 2.5 VL 32B | AWQ INT4 | Yes (~20 GB) | 18–26 |
| Qwen 2.5 VL 72B | AWQ INT4 | No (needs ~44 GB, tight on 4× 24 GB) | — |
| Llama 3.3 70B | FP8 | Yes (~75 GB across 4) | 14–18 |
| 8B class model | Q4_K_M | Yes, headroom for two | 80–120 |
The 72B VLM does not fit comfortably on 4× 24 GB at INT4 — the math is close, but context windows beyond 4K push it over. Either use the 32B VLM variant, or step up to the 8-GPU tier or a 4× RTX Pro 6000 Blackwell node (96 GB VRAM each) for the 72B class. See W07 for the VRAM vs. model tier discussion.
The dev tier handles: one 70B inference model serving 1–3 concurrent robot clients, one VLM (32B class) for visual queries, and occasional LoRA fine-tuning on a smaller base model. That covers 80% of robotics lab use cases in 2026.
The 8-GPU production tier — the extra headroom
192 GB total VRAM (8× 24 GB):
| Model | Quant | Config | Approx. aggregate tok/s (32 concurrent) |
|---|---|---|---|
| Llama 3.3 70B | FP8 | TP=4, PP=2 | 350–500 |
| Qwen 2.5 72B | AWQ INT4 | TP=4, 2 replicas | 400–600 |
| Qwen 2.5 VL 72B | AWQ INT4 | TP=4 | 180–280 |
| 8B model (dialogue) | FP16 | 1 GPU per replica, 8 replicas | 1,200–1,800 |
The 8-GPU tier also opens the door to simultaneous multi-model serving: a 70B LLM on 4 GPUs and a 32B VLM on the other 4, serving a mixed robot fleet with different model requirements at the same time, from one box. On the 4-GPU tier this requires a model-swap step with 30–120 s downtime per swap.
Note on TP=8 for a 70B: TP=8 over PCIe peer-to-peer (no NVLink) scales worse than TP=4 × PP=2 at concurrency above 8 because the all-reduce communication cost grows with tensor parallel degree. The benchmark data shows GPU-to-GPU PCIe bandwidth at 19–22 GB/s — enough for TP=4, but TP=8 all-reduce at high batch sizes saturates those links. The recommended config for a 70B on 8× 4090 is TP=4 × PP=2, as shown in I02.
Rack layout
| U | Component |
|---|---|
| 1 | 1U patch panel (Cat6A, fiber breakout) |
| 2 | 1U ToR switch (10/25 GbE managed) |
| 3 | 2U UPS battery extension (if needed) |
| 4–5 | 2U UPS (5 kVA dev / 10 kVA prod) |
| 6 | 1U PDU (3-phase metered, horizontal) |
| 7 | 1U blank / cable management |
| 8–11 | 4U K-AI compute node (dev) / 6U K-AI compute node (production) |
| 12–13 | Blank / future expansion |
| 14 | 1U jump host / fleet management VM |
| 15 | Blank |
The compute node always sits below the switch and UPS — front-to-back airflow requires the cold air to enter from the front of the rack (cold aisle or room AC supply), pass through the server, and exit into the hot aisle at the rear. See W05 and I04 for the airflow discipline.
The jump host is a 1U or small-form-factor machine with a display port breakout, used for initial bringup, driver installation, and maintenance when the primary server is unreachable over the network. It does not need a GPU. A used workstation or small 1U with 16 GB RAM and a Gen3 SSD is fine.
What this build is not
Not a desktop GPU server in a rack case. The open-air desktop tower build — GPUs mounted on a riser card, no case, fans pointed at the ceiling — is not what is described here. Desktop builds are fine for development; they are not rated for sustained 24/7 operation and do not provide the directed front-to-back airflow that keeps GPUs at steady operating temperature over weeks.
Not an NVLink cluster. RTX 4090 (consumer/workstation class) does not have NVLink. GPU-to-GPU transfers go over PCIe at 19–22 GB/s, not 900 GB/s. This is sufficient for TP=4 inference serving, and it is a real constraint for TP=8 training. If your workload is heavy distributed training on a 70B+ model, RTX Pro 6000 Blackwell (NVLink-capable in its multi-GPU edition) or a platform with NVSwitch changes the math — but also the price. See N03.
Not redundant PSUs. The dual-PSU configuration is split power delivery: PSU A feeds GPUs 0 and 1 (plus motherboard), PSU B feeds GPUs 2 and 3. If PSU A fails, you lose two GPUs and the motherboard. Nothing automatically fails over. This is honest dual-PSU — it balances rail load and reduces single-point risk vs. a single large PSU, but it is not N+1 redundancy. See W04.
Not a cloud alternative for everything. If your lab's primary workload is a single model call ten times a day, the TCO math does not justify on-prem. This build pays back against cloud API spend when you are running sustained inference for multiple clients, fine-tuning regularly, or operating under data-residency constraints. See T02 for the detailed math.
Why these specific choices
AMD EPYC 7542 as the CPU host. A 32-core EPYC provides 128 PCIe 4.0 lanes from the CPU alone, enough for 4× GPUs at x16 without bifurcation, plus a NIC, storage, and a PCIe switch for expansion. EPYC is the standard platform for multi-GPU AI servers at this scale for a reason: Intel Xeon at the same core count provides fewer PCIe lanes, which forces bifurcation compromises on 4+ GPU configs. See W02 for the lane count arithmetic.
512 GB system RAM. The fleet ships with 512 GB (8× 64 GB), which exceeds the nominal 256 GB spec. This is intentional: large model loading during container startup, dataset prefetching for training, and the operating-system page cache all consume RAM that the VRAM cannot. For vLLM with KV-cache swap space enabled, system RAM is directly usable as overflow — a 4 GB swap space per GPU requires 16 GB of system RAM headroom. 512 GB provides that headroom with room for Isaac Sim, which can hold 10–30 GB of simulation state in system RAM during policy training.
2 TB NVMe scratch. The benchmark shows 4,589 MB/s sequential read — fast enough to load a 70B FP8 model (~75 GB) in under 20 seconds. For a lab that swaps models frequently (development workflow, A/B testing inference stacks), load time matters. A slower SATA SSD doubles or triples that time per swap.
Front-to-back rack airflow. The most common mistake on first-time builds: desktop orientation (side intake, top exhaust, rear exhaust) does not work in a sealed rack. The compute node must use directed airflow matching the rack's cold-aisle / hot-aisle convention. See I01 and W05.
The honest take on 2026 hardware
This is a reference build for May 2026. The RTX 4090 is not the newest Kentino GPU option — the RTX 5090 (32 GB VRAM, Blackwell architecture, sm_120) and RTX Pro 6000 Blackwell (96 GB VRAM) are available and change the VRAM-per-card calculus significantly. A 4-GPU node with RTX Pro 6000 Blackwell gives 384 GB of VRAM — enough to host Qwen 2.5 VL 72B comfortably at FP8 on four cards — at a proportionally higher per-card cost.
What does not change between generations: the architectural pattern. AMD EPYC host, PCIe multi-GPU, front-to-back chassis, dual PSU, Ubuntu 24.04, vLLM in Docker, Prometheus + DCGM exporter. That pattern has been consistent across two GPU generations and will survive the next one. The parts list gets cheaper and faster; the pattern holds.
What to do next — sizing flow
Answer these questions in order. Each one gates the next.
- What models do you need to host simultaneously? Write down names and parameter counts. A 70B LLM + a 32B VLM simultaneously requires at least 96 GB VRAM. A 70B LLM + a 72B VLM simultaneously requires 192 GB VRAM or more. This is your VRAM floor. If the floor exceeds 96 GB, the dev tier is not your build.
- How many concurrent robot clients at peak? One robot with occasional queries → dev tier handles it. Four robots running continuous perception loops (VLM call every 2 seconds each) → 8 concurrent requests sustained, which is manageable on the dev tier but needs measurement against your context length. Eight robots → production tier or two dev-tier nodes.
- Do you need training capacity? LoRA fine-tuning on an 8B model needs ~20 GB VRAM and fits on one RTX 4090. Full fine-tuning of a 70B model needs hundreds of GB of VRAM with gradient checkpointing and 3D parallelism — that is a different conversation. Most labs start with LoRA on small models, which the dev tier handles.
- What is your power and cooling envelope today? Be honest. Run the load table from I04 against your building's existing electrical feed. If you are on a 16 A single-phase circuit shared with the rest of the office, the dev tier requires a new circuit before anything else. This is the most common planning failure.
- Do you have a software integrator? The hardware above is only half the system. The ROS 2 driver for your robot, the gRPC client to vLLM, the scene memory store, the monitoring configuration — that is 2–6 weeks of real engineering work on a new lab. If you are buying the hardware without the integration plan, you are buying the second half of a system without the first. See I02 and I01 for the integration picture.
When you can answer all five, the build size becomes obvious. If you cannot answer question 1 (model list) or question 3 (training scope), come back when you can — those two answers drive 90% of the cost. The Kentino team can quote from a completed answer set; quotes against vague requirements take three rounds of revision and still land wrong.
This is part of the Kentino Wiki, a reference series on AI compute, robotics, and the systems that connect them. Comments and corrections welcome at info@kentino.com.